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| XILINX APPLICATIONS NOTE XAPP023V-V1.00                   BN-5-16-94  |
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README file for the XC4000 16-bit accelerated counter:
======================================================

Note: A more detailed description of this application can be found in
Section 8 of the Xilinx Data Book.

Files included in XAPP023V.ZIP:
-------------------------------
  
  README          This readme file
  SCH\TEST16.1    Top-level test schematic
  SCH\HS16BIT.1   16-bit counter RPM
  SYM\HS16BIT.1   Symbol for the 16-bit counter
  WIR\            Wire files for the above designs

  XNF\            XNF files
  TEST16.LCA      Routed design file
  TEST16.XRP      Xdelay timing report using XC4000-4

HS16BIT is an RPM that implements the accelerated 16-bit counter described in
XAPP023. In an XC4000-4 device, a settling time of 23.5 ns can be achieved, 
for a maximum clock frequency of 42.5 MHz.

Software Versions used:

  DS390 Version 4.1.3a Viewlogic and Interface

Performance:

Xdelay was used to report all clock-to-set-up paths. For the results, see the
XRP file.

