>>>> DSK3A C3x DSP Starter Kit Assembler Rev 1.17
>>>> (c) Copyright 1994-1995 Texas Instruments Incorporated
>>>> Mon Oct 27 15:38:47 1997
>>>> DSKOSC.ASM
>>>>
>>>> Include Open : C3XMMRS.ASM 
>>>> Include Close: C3XMMRS.ASM 
>>>>
>>>> PASS 1 Complete
>>>> Errors: 0  Warnings: 0
>>>>
0x00809802 nocode     ;------------------------------------------------------------------
0x00809802 nocode     ; DSKOSC.ASM
0x00809802 nocode     ; Keith Larson
0x00809802 nocode     ; TMS320 DSP Applications
0x00809802 nocode     ; (C) Copyright 1995,1996
0x00809802 nocode     ; Texas Instruments Incorporated
0x00809802 nocode     ;
0x00809802 nocode     ; This is unsupported freeware with no implied warranties or
0x00809802 nocode     ; liabilities.  See the disclaimer document for details
0x00809802 nocode     ;-------------------------------------------------------------------
0x00809802 nocode     ;
0x00809802 nocode     ;This application is written to run with the DOS executable DSK_OSC.EXE
0x00809802 nocode     ;
0x00809802 nocode     ;STARTUP STUB
0x00809802 nocode     ;------------
0x00809802 nocode     ; The initialization code which is used only on startup is placed inside
0x00809802 nocode     ; the volatile data memory array to gain back internal memory.
0x00809802 nocode     ;
0x00809802 nocode     ;SAMPLING RATES
0x00809802 nocode     ;--------------
0x00809802 nocode     ; The AIC sampling rates can be set to any combination which can still
0x00809802 nocode     ; communicate with the DSP.  Some combinations will work as high as 130 KHz
0x00809802 nocode     ; with substantial performance degradation.  Experimentation is required to
0x00809802 nocode     ; find values that work best, or at all, since some will crash the
0x00809802 nocode     ; communications entirely.
0x00809802 nocode     ;
0x00809802 nocode     ;HOST SYNCHRONIZATION
0x00809802 nocode     ;--------------------
0x00809802 nocode     ; Since the host should not disturb the ADC while data is being collected
0x00809802 nocode     ; an interlock is used to keep the host from timing out.  This application
0x00809802 nocode     ; uses a message box.
0x00809802 nocode     ;
0x00809802 nocode     ;SERIAL PORT REFRESH
0x00809802 nocode     ;-------------------
0x00809802 nocode     ; If the serial port is not serviced once every frame synch an underrun
0x00809802 nocode     ; condition will occur and the port will shut down.  This is important for
0x00809802 nocode     ; the transmit section since putting a new value in the DXR will cause the
0x00809802 nocode     ; previous value to move to the shift register irregardless of the state
0x00809802 nocode     ; of FSX.  Since the bit patterns are data dependent and in this case shifted
0x00809802 nocode     ; by an unknown amount the AIC could be reprogrammed if steps are not taken
0x00809802 nocode     ; to avoid a bad restart.  This is done by placing a zero in the transmitter
0x00809802 nocode     ; whenever the serial port and AIC are likely to underrun.
0x00809802 nocode     ;
0x00809802 nocode     ; To prevent this the communications kernel is written such that the serial
0x00809802 nocode     ; port tranmit channel is updated with zero whenever the kernel enters the
0x00809802 nocode     ; wait for command loop 'spin0'.  When spin0 is exited (RUN command) the
0x00809802 nocode     ; serial port is restarted with the original value.
0x00809802 nocode     ;-------------------------------------------------------------------------
0x00809802 directive  TA       .set   10     ; Default startup values
0x00809802 directive  TB       .set   14     ;
0x00809802 directive  RA       .set   10     ; Default startup values
0x00809802 directive  RB       .set   14     ;
0x00809802 directive           .include "C3XMMRS.ASM"
0x00809802 nocode     ;--------------------------------------------------------------------
0x00809802 nocode     ; C3XMMRS.ASM
0x00809802 nocode     ; Keith Larson
0x00809802 nocode     ; TMS320 DSP Applications
0x00809802 nocode     ; (C) Copyright 1995,1996
0x00809802 nocode     ; Texas Instruments Incorporated
0x00809802 nocode     ;
0x00809802 nocode     ; This is unsupported freeware with no implied warranties or
0x00809802 nocode     ; liabilities.  See the disclaimer document for details
0x00809802 nocode     ;
0x00809802 nocode     ; MMR address locations for the TMS320C30 and TMS320C31
0x00809802 nocode     ;
0x00809802 nocode     ; Use a .include "C3XMMRS.ASM" within your application code
0x00809802 nocode     ; to define the locations of the following locations
0x00809802 nocode     ;--------------------------------------------------------------------
0x00809802 directive  DMA_ctrl  .set 0x808000;  DMA cntl
0x00809802 directive  DMA_srce  .set 0x808004;  DMA srce address
0x00809802 directive  DMA_dest  .set 0x808006;  DMA dest address
0x00809802 directive  DMA_xfr   .set 0x808008;  DMA xfer counter
0x00809802 directive  T0_ctrl   .set 0x808020;  TIM0 gl control
0x00809802 directive  T0_count  .set 0x808024;  TIM0 count
0x00809802 directive  T0_prd    .set 0x808028;  TIM0 prd
0x00809802 directive  T1_ctrl   .set 0x808030;  TIM1 gl control
0x00809802 directive  T1_count  .set 0x808034;  TIM1 count
0x00809802 directive  T1_prd    .set 0x808038;  TIM1 prd
0x00809802 directive  S0_gctrl  .set 0x808040;  SP 0 global control
0x00809802 directive  S0_xctrl  .set 0x808042;  SP 0 FSX/DX/CLKX port ctl
0x00809802 directive  S0_rctrl  .set 0x808043;  SP 0 FSR/DR/CLKR port ctl
0x00809802 directive  S0_tctrl  .set 0x808044;  SP 0 R/X timer control
0x00809802 directive  S0_tcount .set 0x808045;  SP 0 R/X timer counter
0x00809802 directive  S0_tprd   .set 0x808046;  SP 0 R/X timer period
0x00809802 directive  S0_xdata  .set 0x808048;  SP 0 Data transmit
0x00809802 directive  S0_rdata  .set 0x80804C;  SP 0 Data receive
0x00809802 directive  S1_gctrl  .set 0x808050;  SP 1 global control
0x00809802 directive  S1_xctrl  .set 0x808052;  SP 1 FSX/DX/CLKX port ctl
0x00809802 directive  S1_rctrl  .set 0x808053;  SP 1 FSR/DR/CLKR port ctl
0x00809802 directive  S1_tctrl  .set 0x808054;  SP 1 R/X timer control
0x00809802 directive  S1_tcount .set 0x808055;  SP 1 R/X timer counter
0x00809802 directive  S1_tprd   .set 0x808056;  SP 1 R/X timer period
0x00809802 directive  S1_xdata  .set 0x808058;  SP 1 Data transmit
0x00809802 directive  S1_rdata  .set 0x80805C;  SP 1 Data receive
0x00809802 directive  e_buscon  .set 0x808060;  Exp bus control
0x00809802 directive  p_buscon  .set 0x808064;  Pri bus control
0x00809802 nocode     ;
0x00809802 nocode     ; Kernel functions can be accessed through the function
0x00809802 nocode     ; jump table which holds the address of each function
0x00809802 nocode     ;
0x00809802 directive  JJUMP    .set    0x809ff4    ;<- Base address
0x00809802 directive  JXWRIT   .set    0x809ff5    ;
0x00809802 directive  JXREAD   .set    0x809ff6    ;
0x00809802 directive  JXCTXT   .set    0x809ff7    ;
0x00809802 directive  JXRUNF   .set    0x809ff8    ;
0x00809802 directive  JXSTEP   .set    0x809ff9    ;
0x00809802 directive  JXHALT   .set    0x809ffA    ;
0x00809802 directive  JW_HOST  .set    0x809ffB    ;
0x00809802 directive  JR_HOST  .set    0x809ffC    ;
0x00809802 directive  JSPARE   .set    0x809ffd    ;
0x00809802 nocode     ;==================================================
0x00809802 directive            .start  "AICTEST",0x809900
0x00809802 directive            .sect   "AICTEST"
0x00809900 directive  GIE       .set  0x2000
0x00809900 nocode     ;=================================================================
0x00809900 directive  _STOP     .set   1
0x00809900 directive  _START    .set   2
0x00809900 nocode     ;
0x00809900 directive  MSG_BOX   .word  _STOP             ; 0x809900
0x00809900 0x00000001 <word>
0x00809901 directive  TLVL      .word  1000              ; 0x809901
0x00809901 0x000003e8 <word>
0x00809902 directive  A_REG     .word  (TA<<9)+(RA<<2)+0 ; 0x809902
0x00809902 0x00001428 <word>
0x00809903 directive  B_REG     .word  (TB<<9)+(RB<<2)+2 ; 0x809903
0x00809903 0x00001c3a <word>
0x00809904 directive  C_REG     .word  00001011b         ; 0x809904  +/- 6 V
0x00809904 0x0000000b <word>
0x00809905 directive  EDGESEL   .word  0                 ; 0x809905
0x00809905 0x00000000 <word>
0x00809906 directive  SAMPLES   .word  512               ; 0x809906
0x00809906 0x00000200 <word>
0x00809907 directive  A_REGOLD  .word  0
0x00809907 0x00000000 <word>
0x00809908 directive  B_REGOLD  .word  0
0x00809908 0x00000000 <word>
0x00809909 directive  C_REGOLD  .word  0
0x00809909 0x00000000 <word>
0x0080990a nocode     ;
0x0080990a directive  OSC_DATA  .word  O_DATA
0x0080990a 0x00809a00 <word>
0x0080990b directive  S0_gctrl_val  .word  0x0E970300 ; Runtime value XINT/RINT enabled
0x0080990b 0x0e970300 <word>
0x0080990c directive  S0_xctrl_val  .word  0x00000111 ;
0x0080990c 0x00000111 <word>
0x0080990d directive  S0_rctrl_val  .word  0x00000111 ;
0x0080990d 0x00000111 <word>
0x0080990e nocode     ;-------------------------------
0x0080990e 0x08020000 R_edge    ldi   R0,R2           ; Initialize post sample
0x0080990f 0x64809915           rptb  Rno_trg         ;
0x00809910 0x6280995c R_trgr    call  GETADC          ;
0x00809911 0x04a29901           cmpi  @TLVL,R2        ;
0x00809912 0x6a070002           blt   Rno_trg         ;
0x00809913 0x04a09901           cmpi  @TLVL,R0        ;
0x00809914 0x6a070017           blt   trgrd           ;
0x00809915 0x08020000 Rno_trg   ldi   R0,R2           ; decrement RC
0x00809916 0x6a000015           b     trgrd           ;
0x00809917 nocode     ;-------------------------------
0x00809917 0x08760030 main      ldi   0x30,IE         ; Ignore the host while collecting data
0x00809918 0x0820804c           ldi   @S0_rdata,R0    ; Clear SP under/overflow
0x00809919 0x08600000           ldi   0,R0            ;
0x0080991a 0x15208048           sti   R0,@S0_xdata    ;
0x0080991b 0x0820804c           ldi   @S0_rdata,R0    ;
0x0080991c 0x08600000           ldi   0,R0            ;
0x0080991d 0x15208048           sti   R0,@S0_xdata    ;
0x0080991e nocode     
0x0080991e 0x087b0019           ldi   25,RC           ; Preload some ADC data to flush out
0x0080991f 0x64809920           rptb  preload         ; the AIC after putting it to sleep
0x00809920 0x6280995c preload   call  GETADC          ;
0x00809921 nocode               ;---------------------
0x00809921 0x087b0fa0           ldi   4000,RC         ; Trigger within N samples
0x00809922 0x08229905           ldi   @EDGESEL,R2     ;
0x00809923 0x6a06ffea           bnz   R_edge          ;
0x00809924 nocode               ;---------------------
0x00809924 0x08020000 F_edge    ldi   R0,R2           ; Initialize post sample
0x00809925 0x6480992b           rptb  Fno_trg         ;
0x00809926 0x6280995c F_trgr    call  GETADC          ;
0x00809927 0x04a29901           cmpi  @TLVL,R2        ;
0x00809928 0x6a090002           bgt   Fno_trg         ;
0x00809929 0x04a09901           cmpi  @TLVL,R0        ;
0x0080992a 0x6a090001           bgt   trgrd           ;
0x0080992b 0x08020000 Fno_trg   ldi   R0,R2           ; decrement RC
0x0080992c nocode               ;---------------------
0x0080992c 0x0804001b trgrd     ldi    RC,R4          ; Set trigger bit if no timeout has occured
0x0080992d 0x50610001           ldiu   1,R1           ; LDIU does not corrupt status
0x0080992e 0x52e10000           ldiz   0,R1           ; If RC=0 no trigger event ocurred
0x0080992f nocode               ;---------------------
0x0080992f 0x0828990a           ldi   @OSC_DATA,AR0   ;
0x00809930 0x083b9906           ldi   @SAMPLES,RC     ; Now get samples, packed two/loop
0x00809931 0x03fbffff           ash   -1,RC           ;
0x00809932 nocode     
0x00809932 0x187b0001           subi  1,RC            ;
0x00809933 0x09e00010           lsh   16,R0           ; Save pre/post-trigger values for host side
0x00809934 0x02e2ffff           and   0xFFFF,R2       ; analysis.  By evaluating which is closer
0x00809935 0x10020000           or    R0,R2           ; to the threshold the data can be pre-post
0x00809936 0x15422001           sti   R2,*AR0++       ; shifted to steady the display
0x00809937 nocode     
0x00809937 0x64809940           rptb  samples         ; packing 2 ints per word
0x00809938 0x6280995c           call  GETADC          ;
0x00809939 0x10000001           or    R1,R0           ;
0x0080993a 0x08020000           ldi   R0,R2           ;
0x0080993b 0x02e2ffff           and   0xFFFF,R2       ;
0x0080993c 0x6280995c           call  GETADC          ;
0x0080993d 0x10000001           or    R1,R0           ;
0x0080993e 0x09e00010           lsh   16,R0           ;
0x0080993f 0x10000002           or    R2,R0           ;
0x00809940 0x15402001 samples   sti   R0,*AR0++       ; store to data array
0x00809941 nocode               ;---------------------
0x00809941 0x08600000           ldi   0,R0            ; The host may take some time to complete
0x00809942 0x15208048           sti   R0,@S0_xdata    ; all tasks so use a safe DXR shut down value
0x00809943 nocode               ;---------------------
0x00809943 0x08760004           ldi   0x4,IE          ; Only service host interrupts now
0x00809944 0x08600002           ldi   _START,R0       ;
0x00809945 0x04a09900 NO_START  cmpi  @MSG_BOX,R0     ; Restart when START message is received
0x00809946 0x6a06fffe           bnz   NO_START        ;
0x00809947 0x08600001           ldi   _STOP,R0        ; Set MSG box to STOP
0x00809948 0x15209900           sti   R0,@MSG_BOX     ;
0x00809949 nocode               ;---------------------
0x00809949 0x08620000           ldi   0,R2            ;
0x0080994a 0x08209902           ldi   @A_REG   ,R0    ; Reload any new runtime parameters
0x0080994b 0x04a09907           cmpi  @A_REGOLD,R0    ;
0x0080994c 0x53620001           ldinz 1,R2            ;
0x0080994d 0x15209907           sti   R0,@A_REGOLD    ;
0x0080994e nocode               ;- - - - - - - - - - -
0x0080994e 0x08209903           ldi   @B_REG   ,R0    ;
0x0080994f 0x04a09908           cmpi  @B_REGOLD,R0    ;
0x00809950 0x53620001           ldinz 1,R2            ;
0x00809951 0x15209908           sti   R0,@B_REGOLD    ;
0x00809952 nocode               ;- - - - - - - - - - -
0x00809952 0x08209904           ldi   @C_REG   ,R0    ;
0x00809953 0x04a09909           cmpi  @C_REGOLD,R0    ;
0x00809954 0x53620001           ldinz 1,R2            ;
0x00809955 0x15209909           sti   R0,@C_REGOLD    ;
0x00809956 nocode               ;- - - - - - - - - - -
0x00809956 0x04e20000           cmpi  0,R2            ;
0x00809957 0x6a05ffbf           bz    main            ;
0x00809958 0x6280998e           call  AIC_INIT        ; Restart with new AIC setup
0x00809959 0x6a00ffbd           b     main            ; Do it all over again!
0x0080995a nocode     ;***************************************************************************
0x0080995a directive  RAMP      .word 0               ;
0x0080995a 0x00000000 <word>
0x0080995b directive  FLAGS     .word 0
0x0080995b 0x00000000 <word>
0x0080995c nocode     
0x0080995c 0x08760030 GETADC    ldi   0x30,IE         ; Come here and wait for ADC interrupt
0x0080995d 0x06000000           IDLE                  ; confirmation to save power and code space
0x0080995e nocode            ;  or    GIE,ST          ;
0x0080995e 0x0820995b           ldi   @FLAGS,R0       ;
0x0080995f 0x1a600020           tstb  0x20,R0         ;
0x00809960 0x6a05fffc           bz    $-3             ;
0x00809961 0x03600020           andn  0x20,R0         ;
0x00809962 0x1520995b           sti   R0,@FLAGS       ;
0x00809963 0x0820804c           ldi   @S0_rdata,R0    ; Return sign extended ADC value
0x00809964 0x09e00010           lsh   16,R0           ;
0x00809965 0x03e0fff0           ash   -16,R0          ;
0x00809966 0x78800000           rets
0x00809967 nocode     
0x00809967 0x0f350000 ADC       push  ST              ; On interrupt, set a software flag to
0x00809968 0x0f200000           push  R0              ; let the CPU know that the RINT has been
0x00809969 0x0820804c           ldi   @S0_rdata,R0    ;
0x0080996a 0x0820995b           ldi   @FLAGS,R0       ;
0x0080996b 0x10600020           or    0x20,R0         ;
0x0080996c 0x1520995b           sti   R0,@FLAGS       ;
0x0080996d 0x0e200000           pop   R0              ;
0x0080996e 0x0e350000           pop   ST              ;
0x0080996f 0x78000000           reti                  ;
0x00809970 nocode     
0x00809970 0x0f350000 DAC       push  ST              ;
0x00809971 0x0f210000           push  R1              ;
0x00809972 0x0821995a           ldi   @RAMP,R1        ; Send RAMP signal out DAC for loopback test
0x00809973 0x18610100           subi  256,R1          ;
0x00809974 0x09e10011           lsh   17,R1           ; Decrease
0x00809975 0x03e1ffef           ash   -17,R1          ;
0x00809976 0x03610003           andn  3,R1            ;
0x00809977 0x1521995a           sti   R1,@RAMP        ;
0x00809978 0x15218048           sti   R1,@S0_xdata    ; loopback ADC->DAC
0x00809979 0x0e210000           pop   R1
0x0080997a 0x0e350000           pop   ST
0x0080997b 0x78000000           reti
0x0080997c nocode     
0x0080997c nocode     ;--------------------------------
0x0080997c 0x0f210000 prog_AIC  push  R1              ;
0x0080997d 0x0f360000           push  IE              ;
0x0080997e 0x08760010           ldi   0x10,IE         ;
0x0080997f 0x03770030           andn  0x30,IF         ;
0x00809980 0x08218048           ldi   @S0_xdata,R1    ; Use original DXR data during 2 ndy
0x00809981 0x15218048           sti   R1,@S0_xdata    ;
0x00809982 0x06000000           idle
0x00809983 0x08218048           ldi   @S0_xdata,R1    ; Use original DXR data during 2 ndy
0x00809984 0x10610003           or    3,R1            ; Request 2 ndy XMIT
0x00809985 0x15218048           sti   R1,@S0_xdata    ;
0x00809986 0x06000000           idle                  ;
0x00809987 0x15208048           sti   R0,@S0_xdata    ; Send register value
0x00809988 0x06000000           idle                  ;
0x00809989 0x03610003           andn  3,R1            ;
0x0080998a 0x15218048           sti   R1,@S0_xdata    ; Leave with original safe value in DXR
0x0080998b 0x0e360000           pop   IE              ;
0x0080998c 0x0e210000           pop   R1              ;
0x0080998d 0x78800000           rets                  ;
0x0080998e nocode     ;======================================================;
0x0080998e nocode     ; This section of code is called by the initialization ;
0x0080998e nocode     ; code as well as by the main program loop.  It is     ;
0x0080998e nocode     ; therfor assembled into the regular program RAM       ;
0x0080998e nocode     ;======================================================;
0x0080998e 0x0f200000 AIC_INIT  push  R0              ;
0x0080998f 0x08760010           LDI   0x10,IE         ; Enable XINT interrupt
0x00809990 0x03770034           andn  0x34,IF         ;
0x00809991 nocode     AIC_reset
0x00809991 0x08600000           ldi   0,R0            ;
0x00809992 0x15208048           sti   R0,@S0_xdata    ;
0x00809993 0x13fb0040           RPTS  0x040           ;
0x00809994 0x08780002           LDI   2,IOF           ; XF0=0 resets AIC
0x00809995 0x13fb0040           rpts  0x40            ;
0x00809996 0x08780006           LDI   6,IOF           ; XF0=1 runs AIC
0x00809997 nocode     
0x00809997 0x0820804c           ldi   @S0_rdata,R0
0x00809998 0x08600000           ldi   0,R0
0x00809999 0x15208048           sti   R0,@S0_xdata
0x0080999a nocode     
0x0080999a nocode               ;-----------------------------
0x0080999a 0x08209904           ldi   @C_REG,R0       ; Setup control register
0x0080999b 0x6280997c           call  prog_AIC        ;
0x0080999c 0x0860fffc           ldi   0xfffc  ,R0     ; Program the AIC to be real slow
0x0080999d 0x6280997c           call  prog_AIC        ;
0x0080999e 0x0860fffe           ldi   0xfffc|2,R0     ;
0x0080999f 0x6280997c           call  prog_AIC        ;
0x008099a0 0x08209903           ldi   @B_REG,R0       ; Bump up the Fs to final rate
0x008099a1 0x6280997c           call  prog_AIC        ; (smallest divisor should be last)
0x008099a2 0x08209902           ldi   @A_REG,R0       ;
0x008099a3 0x6280997c           call  prog_AIC        ;
0x008099a4 0x0e200000           pop   R0              ;
0x008099a5 0x08600000           ldi   0,R0            ; Put a safe 0 in DXR
0x008099a6 0x15208048           sti   R0,@S0_xdata    ;
0x008099a7 0x0820804c           ldi   @S0_rdata,R0    ; Clear receive underrun
0x008099a8 0x78800000           rets                  ;
0x008099a9 nocode     ;-------------------------------------------
0x008099a9 directive            .start "OSCDATA",0x809A00
0x008099a9 directive            .sect  "OSCDATA"
0x00809a00 directive  O_DATA    .word  0
0x00809a00 0x00000000 <word>
0x00809a01 nocode     ;*****************************************************;
0x00809a01 nocode     ; Startup stub...                                     ;
0x00809a01 nocode     ;                                                     ;
0x00809a01 nocode     ; The following section of code is used only once for ;
0x00809a01 nocode     ; initialization and can be safely overwritten by     ;
0x00809a01 nocode     ; assembling it into the stack or volatile data       ;
0x00809a01 nocode     ; storage.                                            ;
0x00809a01 nocode     ;*****************************************************;
0x00809a01 directive            .entry   ST_STUB
0x00809a01 0x50700080 ST_STUB   ldp   T0_ctrl         ; Use kernel data page and stack
0x00809a02 0x08600000           ldi   0,R0            ; Halt TIM0 & TIM1
0x00809a03 0x15208020           sti   R0,@T0_ctrl     ;
0x00809a04 0x15208030           sti   R0,@T1_ctrl     ;
0x00809a05 0x15208024           sti   R0,@T0_count    ; Set counts to 0
0x00809a06 0x15208034           sti   R0,@T1_count    ;
0x00809a07 0x08600001           ldi   1,R0            ; Set periods to 1
0x00809a08 0x15208028           sti   R0,@T0_prd      ;
0x00809a09 0x15208038           sti   R0,@T1_prd      ;
0x00809a0a 0x086002c1           ldi   0x2C1,R0        ; Restart both timers
0x00809a0b 0x15208020           sti   R0,@T0_ctrl     ;
0x00809a0c 0x15208030           sti   R0,@T1_ctrl     ;
0x00809a0d nocode               ;---------------------
0x00809a0d 0x0820990c           ldi   @S0_xctrl_val,R0;
0x00809a0e 0x15208042           sti   R0,@S0_xctrl    ; transmit control
0x00809a0f 0x0820990d           ldi   @S0_rctrl_val,R0;
0x00809a10 0x15208043           sti   R0,@S0_rctrl    ; receive control
0x00809a11 0x08600000           ldi   0,R0            ;
0x00809a12 0x15208048           sti   R0,@S0_xdata    ; DXR data value
0x00809a13 0x0820990b           ldi   @S0_gctrl_val,R0; Setup serial port
0x00809a14 0x15208040           sti   R0,@S0_gctrl    ; global control
0x00809a15 nocode               ;---------------------
0x00809a15 0x6280998e           call  AIC_INIT        ; Initialize the AIC
0x00809a16 0x08760030           ldi   0x30,IE         ; Service both RINT/XINT
0x00809a17 0x0820804c           ldi   @S0_rdata,R0    ;
0x00809a18 nocode          ;    ldi   0,R0            ; Put a safe 0 in DXR
0x00809a18 nocode          ;    sti   R0,@S0_xdata    ;
0x00809a18 0x6a00fefe           b     main            ;
0x00809a19 nocode     
0x00809a19 directive  S0_dxr   .word  S0_xdata
0x00809a19 0x00808048 <word>
0x00809a1a nocode     ;****************************************************;
0x00809a1a nocode     ; Install the XINT/RINT ISR handler directly into    ;
0x00809a1a nocode     ; the vector RAM location it will be used in         ;
0x00809a1a nocode     ;****************************************************;
0x00809a1a directive            .start   "SP0VECTS",0x809FC5
0x00809a1a directive            .sect    "SP0VECTS"
0x00809fc5 0x6a00f9aa           b        DAC        ; XINT0
0x00809fc6 0x6a00f9a0           b        ADC        ; RINT0
0x00809fc7 directive            .end
>>>>
>>>> PASS 2 Complete
>>>> Errors: 0  Warnings: 0
>>>>
>>>> ENTRY 0x00809a01
>>>>
>>>> Symbol reference table           Type  Addressable
>>>> ref     Default_sect 0x00809802  1     1
>>>> ref               TA 0x0000000a  1     0
>>>> ref               TB 0x0000000e  1     0
>>>> ref               RA 0x0000000a  1     0
>>>> ref               RB 0x0000000e  1     0
>>>> ref         DMA_ctrl 0x00808000  1     0
>>>> ref         DMA_srce 0x00808004  1     0
>>>> ref         DMA_dest 0x00808006  1     0
>>>> ref          DMA_xfr 0x00808008  1     0
>>>> ref          T0_ctrl 0x00808020  1     0
>>>> ref         T0_count 0x00808024  1     0
>>>> ref           T0_prd 0x00808028  1     0
>>>> ref          T1_ctrl 0x00808030  1     0
>>>> ref         T1_count 0x00808034  1     0
>>>> ref           T1_prd 0x00808038  1     0
>>>> ref         S0_gctrl 0x00808040  1     0
>>>> ref         S0_xctrl 0x00808042  1     0
>>>> ref         S0_rctrl 0x00808043  1     0
>>>> ref         S0_tctrl 0x00808044  1     0
>>>> ref        S0_tcount 0x00808045  1     0
>>>> ref          S0_tprd 0x00808046  1     0
>>>> ref         S0_xdata 0x00808048  1     0
>>>> ref         S0_rdata 0x0080804c  1     0
>>>> ref         S1_gctrl 0x00808050  1     0
>>>> ref         S1_xctrl 0x00808052  1     0
>>>> ref         S1_rctrl 0x00808053  1     0
>>>> ref         S1_tctrl 0x00808054  1     0
>>>> ref        S1_tcount 0x00808055  1     0
>>>> ref          S1_tprd 0x00808056  1     0
>>>> ref         S1_xdata 0x00808058  1     0
>>>> ref         S1_rdata 0x0080805c  1     0
>>>> ref         e_buscon 0x00808060  1     0
>>>> ref         p_buscon 0x00808064  1     0
>>>> ref            JJUMP 0x00809ff4  1     0
>>>> ref           JXWRIT 0x00809ff5  1     0
>>>> ref           JXREAD 0x00809ff6  1     0
>>>> ref           JXCTXT 0x00809ff7  1     0
>>>> ref           JXRUNF 0x00809ff8  1     0
>>>> ref           JXSTEP 0x00809ff9  1     0
>>>> ref           JXHALT 0x00809ffa  1     0
>>>> ref          JW_HOST 0x00809ffb  1     0
>>>> ref          JR_HOST 0x00809ffc  1     0
>>>> ref           JSPARE 0x00809ffd  1     0
>>>> ref          AICTEST 0x00809900  1     1
>>>> ref              GIE 0x00002000  1     0
>>>> ref            _STOP 0x00000001  1     0
>>>> ref           _START 0x00000002  1     0
>>>> ref          MSG_BOX 0x00809900  1     1
>>>> ref             TLVL 0x00809901  1     1
>>>> ref            A_REG 0x00809902  1     1
>>>> ref            B_REG 0x00809903  1     1
>>>> ref            C_REG 0x00809904  1     1
>>>> ref          EDGESEL 0x00809905  1     1
>>>> ref          SAMPLES 0x00809906  1     1
>>>> ref         A_REGOLD 0x00809907  1     1
>>>> ref         B_REGOLD 0x00809908  1     1
>>>> ref         C_REGOLD 0x00809909  1     1
>>>> ref         OSC_DATA 0x0080990a  1     1
>>>> ref     S0_gctrl_val 0x0080990b  1     1
>>>> ref     S0_xctrl_val 0x0080990c  1     1
>>>> ref     S0_rctrl_val 0x0080990d  1     1
>>>> ref           R_edge 0x0080990e  1     1
>>>> ref           R_trgr 0x00809910  1     1
>>>> ref          Rno_trg 0x00809915  1     1
>>>> ref             main 0x00809917  1     1
>>>> ref          preload 0x00809920  1     1
>>>> ref           F_edge 0x00809924  1     1
>>>> ref           F_trgr 0x00809926  1     1
>>>> ref          Fno_trg 0x0080992b  1     1
>>>> ref            trgrd 0x0080992c  1     1
>>>> ref          samples 0x00809940  1     1
>>>> ref         NO_START 0x00809945  1     1
>>>> ref             RAMP 0x0080995a  1     1
>>>> ref            FLAGS 0x0080995b  1     1
>>>> ref           GETADC 0x0080995c  1     1
>>>> ref              ADC 0x00809967  1     1
>>>> ref              DAC 0x00809970  1     1
>>>> ref         prog_AIC 0x0080997c  1     1
>>>> ref         AIC_INIT 0x0080998e  1     1
>>>> ref        AIC_reset 0x00809991  1     1
>>>> ref          OSCDATA 0x00809a00  1     1
>>>> ref           O_DATA 0x00809a00  1     1
>>>> ref          ST_STUB 0x00809a01  1     1
>>>> ref           S0_dxr 0x00809a19  1     1
>>>> ref         SP0VECTS 0x00809fc5  1     1
>>>>
>>>>        Output section start       end         length
>>>> sect     Default_sect 0x00809802  0x00809802  0x00000000
>>>> sect          AICTEST 0x00809900  0x008099a9  0x000000a9
>>>> sect          OSCDATA 0x00809a00  0x00809a1a  0x0000001a
>>>> sect         SP0VECTS 0x00809fc5  0x00809fc7  0x00000002
>>>>
>>>>
>>>> END DSK
