	pure
* qsort interface to c

*	qsort(from, to)

	entry	qsort
	entry	clock
	entry	onhup
	entry	itinit

r0	equ	0
r1	equ	1
r2	equ	2
r3	equ	3
r4	equ	4
r5	equ	5
r6	equ	6
sp	equ	7
rf	equ	15

signal	equ	48
seek	equ	19
time	equ	13

qsort	equ	*
	l	r1,0(sp)	low address
	l	r2,4(sp)	high address


qso	equ	*
	lr	r3,r2
	sr	r3,r1		distance
	chi	r3,4
	bnp	done
	srls	r3,1		half distance
	nhi	r3,-4
	ar	r3,r1		new high address
	sis	sp,12
	st	r1,4(sp)
	st	r2,0(sp)

loop	equ	*
	cr	r1,r3
	bnl	loop1
	lh	r5,0(r1)
	ch	r5,0(r3)	first larger?
	bp	loop1		yes - go check top half
	ais	r1,4
	b	loop

loop1	equ	*
	cr	r2,r3
	bnp	loop1a
	sis	r2,4
	lh	r5,0(r2)
	ch	r5,0(r3)	second smaller?
	bnl	loop1		no - keep looking

	l	r0,0(r1)	swap items
	l	r5,0(r2)
	st	r5,0(r1)
	st	r0,0(r2)
	cr	r1,r3
	bne	loop
	lr	r3,r2
	b	loop

loop1a	equ	*
	cr	r1,r3
	be	loop1b
	l	r0,0(r1)
	l	r5,0(r2)
	st	r5,0(r1)
	st	r0,0(r2)
	lr	r3,r1
	b	loop1

loop1b	equ	*
	l	r2,0(sp)
	st	r3,0(sp)
	lr	r1,r3
	ais	r1,4
	st	rf,8(sp)
	bal	rf,qso
	l	r2,0(sp)
	l	r1,4(sp)
	l	rf,8(sp)
	ais	sp,12
	b	qso

done	equ	*
	br	rf


*	itinit()

	extrn	intrp,term

itinit	equ	*
	svc	14,signal
	dc	1,1
	thi	r0,1
	bne	it1
	svc	14,signal
	dc	1,onhup
it1	equ	*
	svc	14,signal
	dc	2,1
	thi	r0,1
	bne	it2
	svc	14,signal
	dc	2,onint
it2	equ	*
*	svc	14,signal
*	dc	3,1
	br	rf

onhup	equ	*
	svc	14,signal
	dc	1,1
	svc	14,signal
	dc	2,1
	svc	14,signal
	dc	3,1
	b	term

onint	equ	*
	sis	sp,4
	st	r0,0(sp)
	svc	14,signal
	dc	2,onint
	lis	r0,1
	ahm	r0,intrp
	l	r0,0(sp)
	ais	sp,4
	svc	14,signal
	dc	0,0


*	t = clock()

clock	equ	*
	svc	14,time
	lr	r0,r1
	s	r0,t
	st	r1,t
	br	rf

	impur
	align	adc
t	dc	0
	end
