/*
 * 5799-WZQ (C) COPYRIGHT IBM CORPORATION 1987
 * LICENSED MATERIALS - PROPERTY OF IBM
 * REFER TO COPYRIGHT INSTRUCTIONS FORM NUMBER G120-2083
 */

/* $Header:post.h 12.0$ */
/* $ACIS:post.h 12.0$ */
/* $Source: /ibm/acis/usr/sys/ca/RCS/post.h,v $ */

#if !defined(lint) && !defined(LOCORE) && defined(RCS_HDRS)
static char *rcsidpost = "$Header:post.h 12.0$";
#endif

/* see chapter 7 of VRM Tech Ref (SV21-8013 or 55X8936) for
 * greater detail on this Power On Self Test control block */

#define	NPOSTS	48

struct	post_cb {	/* initialized by ROS */
	u_int	numbadmem;
	u_int	badmem[255];
	u_char	misc[256];	/* all sorts of goodies */
	struct post {
		char	rsvd[3];
		char	post_id;
		u_int	adap_bad	: 1;
		u_int	adap_present	: 1;
		u_int	adap_errs	: 30;	/* ? */
		char	adap_type;
#define ADAP_HD		0x52
#define	ADAP_FD		0x53
#define	ADAP_HD_HESDI	0x86
#define	ADAP_NONE	0xff
		char	adap_slot;
		u_short	primary;	/* I/O address */
		char	interrupt;	/* level(s) */
		char	dma;		/* level(s) */
		u_short	secondary;	/* I/O address */
	} posts[NPOSTS];
};

#ifdef STANDALONE
#define	POST_CB	(*(struct post_cb *)0x800)
#else
#define	POST_CB	(*(struct post_cb *)(SYSBASE+0x800))
#endif
